Agilent Technologies E1330B Uživatelský manuál Strana 112
- Strana / 156
- Tabulka s obsahem
- KNIHY
Hodnocené. / 5. Na základě hodnocení zákazníků
110 Agilent E1330B Digital I/O Module Register Information
Appendix B
The module is a register-based slave/interrupter device, supporting VME
D16, D8(O), and D8(OE) transfers. The interrupt protocol supported is
“release on interrupt acknowledge” – an interrupt is cleared by a VXIbus
interrupt acknowledge cycle.
WARNING Registers have been documented as 8 bit bytes. If you access
them using 16 bit transfers from a Motorola CPU, the high and
low byte will be swapped. The Agilent E1300/01 Mainframe and
Agilent E1405/06 Command Modules use Motorola CPUs.
Motorola CPUs place the highest weighted byte in the lower
memory location and the lower weighted byte in the higher
memory address; Intel processors do just the opposite. VXI
registers are memory mapped, thus you will see this
Motorola/Intel byte swap difference when doing register
programming.
- *E1330-90007* 1
- Contents 3
- 2 Contents 4
- Contents 3 5
- 4 Contents 6
- Certification 7
- Safety Symbols 8
- WARNINGS 8
- Documentation History 8
- DECLARATION OF CONFORMITY 9
- Getting Started 13
- 12 Getting Started 14
- Chapter 1 14
- Table 1-1. Data Lines 14
- Instrument Definition 15
- Downloading SCPI Drivers 15
- SCPI Command 16
- Format Used in This 16
- Specifying SCPI 16
- Commands 16
- Specifying Multiple Port 17
- Operations 17
- Initial Operation 18
- Chapter 2 19
- Using This Chapter 19
- Setting the Address Switch 20
- Enabling Pull-ups 21
- Selecting the Interrupt Line 22
- Combining the Flag Lines 23
- Using with External Pull-ups 30
- Typical Connection 31
- Chapter 3 33
- Addressing the Module 33
- Operation Overview 34
- Default and Reset States 35
- Setting the Polarity 35
- Setting the Handshake Mode 36
- Inputting Data Bytes and Bits 37
- Multiple Port Operations 39
- Using Trace Memory 40
- I/O Module 43
- The CTL Line 44
- Using the Handshake Modes 46
- Chapter 4 47
- 0 or 1. Byte or 53
- Multiple Port 56
- Input/Output 56
- Command Reference 59
- SCPI Command Reference 62
- DISPlay Subsystem 63
- :MONitor[:STATe]? 65
- MEASure Subsystem 66
- Parameters 67
- Comments 69
- MEMory Subsystem 70
- :VME:STATe 73
- • *RST Condition: Set to OFF 73
- :VME:STATe? 73
- [SOURce:] Subsystem 74
- 0.000002. MAX returns 0.015 81
- DIGital:DATAn[:type]:POLarity 84
- DIGital:DATAn[:type]:TRACe 85
- DIGital:FLAGn:POLarity 88
- DIGital:FLAGn:POLarity? 88
- DIGital:TRACe:DEFine? 94
- DIGital:TRACe:DELete:ALL 94
- DIGital:TRACe:DELete[:NAME] 94
- STATus Subsystem 95
- :OPERation:CONDition? 96
- :OPERation:ENABle 96
- :OPERation:ENABle? 96
- :OPERation[:EVENt]? 96
- :QUEStionable:CONDition? 97
- :QUEStionable:ENABle 97
- :QUEStionable:ENABle? 97
- :QUEStionable[:EVENt]? 97
- SYSTem Subsystem 98
- • Related Commands: *ERR 99
- • *RST Condition: None 99
- :VERSion? 99
- IEEE 488.2 Common Commands 100
- Command Quick Reference 101
- Chapter 5 104
- Appendix A 105
- Information 107
- A16 Address Space 108
- Outside the Command 108
- Module or Mainframe 109
- Inside the Command 109
- Reset and Registers 111
- Register Definitions 111
- Appendix B 112
- Register Descriptions 113
- Port Interrupt 114
- Control Register 114
- Port Transfer 115
- Port Control/ 116
- Status Register 116
- Port Handshake 118
- Register 118
- Table B-4. Handshake Type 119
- Table B-5. Range Multipliers 119
- Port Normalization 120
- Programming Examples 123
- Resetting the 124
- Reading the 125
- ID, Device 125
- Type, and 125
- Registers 125
- C Version 126
- Writing an 127
- 8-Bit Byte 127
- Writing a 129
- 16-Bit Word 129
- Reading an 130
- PIR Interrupts 133
- Agilent E1330 133
- B Non-data 138
- Line I/O 138
- Embedded 142
- Computer 142
- Error Messages 145
- 144 Error Messages 146
- Appendix C 146
- Agilent E1330B User’s Manual 147
- 146 Index 148
- C (continued) 149
- 148 Index 150
- I (continued) 151
- M (continued) 152
- P (continued) 153
- R (continued) 154
- S (continued) 155
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