
444 Chapter 15
W-CDMA Uplink Digital Modulation for Receiver Test
W-CDMA Uplink Concepts
Synchronization Diagrams
Signal Alignment for Default DPCH Mode
Figure 15-63 illustrates the timing relationships between the signals from the rear panel
BNC input and output connectors relative to the RF Output connector for default signal
assignments in DPCH mode. Signal states are referenced to the chip clock provided at the
DATA CLK OUT connector.
Figure 15-63 Signal Alignment for Default DPCH Mode
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