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SERVICE MANUALHP 1650B/1651B Logic AnalyzerSERIAL NUMBERSThis manual applies directly to instrumentsprefixed with serial number:2924AFor additional in

Section 6: ServiceIntroduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-1S

Figure 6-9. Trouble Isolation for RS-232-CFigure 6-10. Trouble Isolation for BNCHP 1650B/1651B ServiceService Manual 6-13

Power SupplyVoltages CheckThe power supply must be loaded by either the System Assembly Board or with anadded resistor to check the voltages.Warning T

4. Reconnect instrument power cable and check for voltages at the supplyoutput using values in the following table.PIN SIGNAL PIN SIGNAL1 +5.20 V 11

Keyboard SignalsCheckIsolate a faulty elastomeric keypad or keyboard when random key(s) not operatingby performing the following steps.1. Remove inst

AssemblyRemoval andReplacement This section contains the procedures for removal and installation of majorassemblies. Read the Safety Summary at the f

14. Secure system board to chassis with eight screws.Note Hand-start the self-tapping screws securing the system board. Otherwise, if theholes are no

Removal andReplacement ofCRT MonitorAssembly1. Disconnect pod cables from rear of instrument.2. Disconnect power cable.3. Remove ten screws securin

Removal andReplacement ofPower Supply1. Disconnect pod cables from rear of instrument.2. Disconnect power cable.3. Remove ten screws securing top c

10. Align new fan on back panel with fan cable adjacent to line filter assemblyand label toward rear (fan rotor is facing forward).11. Align fan guard

Self Tests The extended self tests are used for isolating problems in the logic analyzer. Thetests are loaded from the operating disk.Caution The pro

ContentsSection 1 General InformationIntroduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

RS-232-C Self Test The RS-232-C self test verifies the functionality of the RS-232-C driver andcontinuity of the RS-232-C data paths. Connect the RS-2

ROM Self Test The ROM self test verifies the operation of the system ROM.1. In HP 1650B/51B Self Tests menu, move cursor to ROM and SELECT.2. Move c

1General InformationIntroduction This service manual explains how to test, adjust, and service the HP 1650B andHP 1651B Logic Analyzers. This manual

SafetyConsiderationsThis product is a Safety Class 1 instrument (provided with a protective earthterminal). Review the instrument and manual for safe

AccessoriesSuppliedThe following accessories are supplied with the HP 1650B/51B Logic Analyzer. Woven probe cable (HP part number 01650-61607) with 4

Logic AnalyzerSpecificationsThe following specifications are the performance standards or limits against whichthe HP 1650B/51B Logic Analyzer is teste

OperatingCharacteristicsThe following operating characteristics are are typical operating characteristics forthe HP 1650B/51B Logic Analyzer.Probes In

State Analysis MEMORYData Acquisition: 1024 samples/channel.Trace SpecificationClocks: Five clocks (HP 1650B) or two clocks (HP 1651B) are available

TaggingState Tagging: Counts the number of qualified states between each stored state.Measurement can be shown relative to the previous state or rela

Overlay Mode: Multiple channels can be displayed on one waveform display line.Primary use is to view summary of bus activity.Maximum Number Of Displa

Dear Customer: You have probably heard from news reports and from your sales representative that as of November 1, 1999, four of Hewlett-Packar

IndicatorsActivity Indicators: Provided in the Configuration, State Format, and TimingFormat menus for identifying high, low, or changing states on t

Humidity: Instruments up to 95% relative humidity at + 40 C; (104 F).Recommended humidity range for disk media, 8% to 80% relative humidity at+40C (+

Oscilloscope dual channel HP 54502A P,Tdc to 300 MHzPulse 5 ns pulse width HP 8161A/020 PGenerator 20 ns period1.3 ns risetimedouble pulse100 kHz Repe

Section 2 InstallationIntroduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2InstallationIntroduction This section of the manual contains information and instructions necessary forsetting up the HP 1650B/51B Logic Analyzer. T

Line VoltageSelectionWhen shipped from the factory, the line voltage selector is set and an appropriatefuse is installed for operating the instrument

3. Reinsert the fuse module with the arrows aligned for your application. Seefuse module below.4. Reconnect the power cord, turn the rear power swi

Table 2-1. Power Plug ConfigurationsInstallation HP 1650B/1651B2-4 Service Manual

User Interface The front-panel user interface of the HP 1650B/51B consists of front-panel keys,the KNOB, and display. The interface allows configurat

HP-IB AddressSelectionEach instrument connected to the HP-IB interface bus requires a unique address.The address provides a method for the system comp

HerstellerbescheinigungHiermit wird bescheinigt, da das Gerät/System in Übereinstimmung mit denBestimmungen von Postverfügung 1046/84 funkentstört is

4. Select the HP-IB Address field with the KNOB and press the SELECT key.5. When the pop-up field appears on screen, rotate the KNOB to select thede

RS-232-CConfigurationAt power up, the RS-232-C interface is configured as shown in previous figure. Tochange the RS-232-C configuration:1. Press the

4. Using the KNOB and SELECT key, configure the RS-232-C interface asdesired.5. Select the DONE field in the upper-right corner with the KNOB to exi

OriginalPackagingIf the original packaging material is unavailable or unserviceable, materialsidentical to those used in factory packaging are availab

ContentsSection 3 Performance TestsIntroduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3Performance TestsIntroduction These procedures test the electrical performance of the logic analyzer by using thespecifications in table 1-1 as the p

Self Tests The power-up self test is automatically performed upon applying power to thelogic analyzer. Since the performance tests require test equip

Selectable SelfTestsSeven self tests may be invoked individually via the Self Test menu. The sevenselectable self tests are:Data AcquisitionRS-232-CE

Clock,Qualifier, andData InputsTest 1Description: This test verifies maximum clock rate with counting mode for the HP1650B/51B. This test also verifi

CERTIFICATIONHewlett-Packard Company certifies that this product met its published specifications at the time of ship-ment from the factory. Hewlett-P

2. Adjust pulse generator for the output in figure 3-3.Setting for HP 8161A:Parameter Output A Output BInput Mode Norm ---Period (PER) 60 ns ---Widt

4. In the State Format Specification assign Clock Period > 60 ns. Also assignlower 8 channels of the pod under test to a label as shown in next

c. Move cursor to the bit assignment field and turn on appropriate eightbits to be tested (* = on; . = off) as in figure below.5. Set up the State

6. Press RUN. The State Listing is displayed and shows Fs for the channelsunder test, when test is passed, as in figure 3-9.Note To ensure consis

Clock,Qualifier, andData InputsTest 2Description: This test verifies the setup and hold time specification for the risingedge transition of all clock

2. Adjust pulse generator for the output in figure 3-11. Pulse generator settingsare different for HP 1650B and HP 1651B.Setting for HP 8161A:Parame

5. Set the State Trace Specification without sequencing levels and set Count toOff as in Figure 3-13.6. Press RUN. The State Listing is displaye

7. Connect the next clock to the test connector and repeat steps 4 and 6 for theappropriate clock. Repeat until all clocks have been tested (clocks

Clock,Qualifier, andData InputsTest 3 (HP 1650BOnly)Description: This performance test verifies the hold time specification for thefalling clock tran

Setting for HP 8161A:Parameter Output A Output BInput Mode Norm ---Period (PER) 57 ns ---Width (WID) 11 ns 10 nsLeading Edge (LEE) 1 ns 1 nsTr

Safety ConsiderationsGeneralOperationThis is a Safety Class I instrument (provided with terminal for protective earthing). BEFOREAPPLYING POWER verif

9. Disconnect lower eight bits (bits 0 through 7) from test connector. Attachupper eight bits (bits 8 through 15) to the test connector. Repeat steps

2. Adjust pulse generator for the output in figure 3-19. Pulse generator settingsare different for HP 1650B and HP 1651B.Setting for HP 8161A:Parame

6. Press RUN. The State Listing is displayed and shows alternating Fs and 0sfor the channels under test as in figure 3-20.Note To ensure consistent

Clock,Qualifier, andData InputsTest 5Description: This performance test verifies the maximum clock rate for mixedmode clocking during state operatio

2. Adjust pulse generator for the output in figure 3-22.Setting for HP 8161A:Parameter Output A Output BInput Mode Norm ---Period (PER) 120 ns ---Wi

a. Move cursor to Clock field and SELECT, then assign Mixed Clocks.b. Assign falling transition of the J clock to Master Clock and risingtransition

Clock,Qualifier, andData InputsTest 6Description: This performance test verifies the maximum clock rate fordemultiplexed clocking during state oper

2. Adjust pulse generator for the output in figure 3-26.Setting for HP 8161A:Parameter Output A Output BInput Mode Norm ---Period (PER) 120 ns ---Wi

b. Assign falling clock transition of J clock to Master Clock and rising Jclock transition to Slave Clock.c. Assign ALL channels to pod under test

Glitch Test Description:This performance test verifies the glitch detection specification of the HP 1650B/51B.Specification:Minimum detectable glitch:

Printing HistoryNew editions are complete revisions of the manual. Update packages, which areissued between editions, contain additional and replacem

2. Adjust pulse generator for the output in figure 3-30.Setting for HP 8161A:Parameter Output A Output BInput Mode Norm ---Period (PER) 20 ns ---Wid

5. Set Timing Trace Specification as in figure 3-33. Follow steps a through c ifunfamiliar with menu.a. Move cursor to Acquisition mode field and S

6. Press RUN. The timing analyzer acquires data and shows glitches forchannels under test as in figure 3-34. SELECT Delay field and rotate knobto

ThresholdAccuracy TestDescription: This performance test verifies the threshold accuracy within thethree ranges stated in the specification.Specifica

b. Move cursor to bit assignment field and turn on the appropriate eightbits to be tested (* = on; . = off).4. Set Timing Trace Specification as

5. Adjust the power supply output for + 150 mV.6. Press RUN. Data displayed on Timing Waveforms is be high for the pod andchannels under test as in

14. Return to the Timing Format Specification and change the User Defined podthreshold to -9.9 V.15. Adjust power supply for output of -9.6 V.16. Pres

Hewlett-Packard Tested byModel 1650B/51B ____________Logic Analyzer Work Order No.________Serial Date TestedNumber ________________________Recommended

Test ResultsClock, Qualifier, and Data Passed Failed Inputs Test 6 Pod1 ______ ______Pod2 ______ ______Pod3 ______ ______Pod4 ______ ______Pod5

ContentsSection 4 AdjustmentsIntroduction ...

List of Effective PagesThe List of Effective Pages gives the date of the current edition and of any pageschanged in updates to that edition. Within t

4AdjustmentsIntroduction This section provides adjustment procedures for the HP 1650B/51B. Theassemblies with adjustments are: the power supply, CRT

RecommendedTest EquipmentRecommended test equipment for calibration and adjustment is listed in table 1-3.Any equipment that satisfies the critical sp

Power SupplyAssemblyAdjustment1. Disconnect power cord from HP 1650B/51B. Refer to figure 4-1.2. Connect the negative lead of the voltmeter to Power

CRT MonitorAssemblyAdjustmentsIntensity,Sub-bright,and ContrastAdjustment1. Refer to figure for adjustment locations.2. Place TIMING WAVEFORMS menu

5. Turn rear-panel INTENSITY to bring up the intensity level on screen. Screenintensity should be at a comfortable viewing level and the position of

HorizontalPhase,VerticalLinearity, andHeightAdjustments1. Refer to figure for adjustment locations.2. Place TIMING WAVEFORMS menu on the screen of

System BoardAssemblyThresholdAdjustment1. Disconnect power cord from HP 1650B/51B.2. Connect negative (-) lead of voltmeter to TP GND. Refer to figu

a. Press front-panel FORMAT key.b. Move cursor to TTL (threshold field) and press SELECT.c. Assign User defined threshold by using front-panel knob

ContentsSection 5 Replaceable PartsIntroduction ...

ContentsSection 1: General InformationIntroduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

5Replaceable PartsIntroduction This section contains information for ordering parts. Service support for thisinstrument is to the assembly level. Th

OrderingInformationTo order a replaceable part, indicate the HP part number, check digit, andquantity required. Send the order to the nearest HP Sales

REFERENCE DESIGNATORABBTCCRDLDSE= assembly= fan;motor= battery= capacitor= diode;diode thyristor; varactor= delay line= annunciator;lamp;LED= misc.

Figure 5-1. HP 1650B/51B Exploded ViewReplaceable Parts HP 1650B/1651B5-4 Service Manual

A1 01652-66501 0 1 SYSTEM BOARD ASSEMBLY – 80 CHANNEL (1650B) 28480 01652-66501A1 01653-66501 1 1 SYSTEM BOARD ASSEMBLY – 32 CHANNEL (1651B) 28480 01

MP10 01650-45205 5 1 KEYBOARD SPACER 28480 01650-45205MP11 01650-46101 2 2 LOCKING PIN PCB 28480 01650-46101MP12 01650-00205 1 1 REAR PANEL (1650B) 28

Section 6 ServiceIntroduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-1Sa

6ServiceIntroduction This section provides troubleshooting, service, and repair information for theHP 1650B/51B Logic Analyzer. Troubleshooting consis

Figure 6-1. Simplified Block DiagramService HP 1650B/1651B6-2 Service Manual

Section 3: Performance TestsIntroduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Theory ofOperationThe HP 1650B/51B Logic Analyzer is an 80/32 channel state and timing logicanalyzer. The human interface is a front-panel keypad and

Memory The memory of the logic analyzer consists of three separate memories: one ROMand two RAMs. The system (EP)ROM is 64K long by 8 wide and is us

The DS14C88 and DS14C89 are line drivers/receivers used by the logic analyzerfor interface of terminal equipment with data communications equipment.

TroubleIsolationFlowchartsThe trouble isolation flowcharts are the troubleshooting guide. Start there whenrepairing a defective instrument.The flowch

Figure 6-3. Trouble Isolation Flowchart for Fan/FuseHP 1650B/1651B ServiceService Manual 6-7

Figure 6-4. Trouble Isolation for Power SupplyService HP 1650B/1651B6-8 Service Manual

Figure 6-5. Trouble Isolation for CRT MonitorHP 1650B/1651B ServiceService Manual 6-9

Figure 6-6. Trouble Isolation for Flowchart Service HP 1650B/1651B6-10 Service Manual

Figure 6-7. Trouble Isolation for Disk DriveHP 1650B/1651B ServiceService Manual 6-11

Figure 6-8. Trouble Isolation for Data AcquisitionService HP 1650B/1651B6-12 Service Manual