Agilent Technologies 16800 Series Uživatelský manuál stáhnout pdf (Strana 1)

Agilent Technologies

B4656A FPGA Dynamic Probe for Altera

Data Sheet

The challenge

You rely on the insight a logic

analyzer provides to understand

the behavior of your FPGA in

the context of the surrounding

system. Design engineers

typically take advantage of the

programmability of the FPGA to

route internal nodes to a small

number of physical pins that a

logic analyzer can measure. While

this approach is very useful, it

has significant limitations.

• Since pins on the FPGA are

typically an expensive

resource, there are a relatively

small number available for

debug. This limits internal

visibility (i.e. one pin is

required for each internal

signal to be probed).

• When you need to access

different internal signals, you

must change your design to

route these signals to the

available pins. This can be time

consuming and can affect the

timing of your FPGA design.

• Finally, the process required

to map the signal names from

your FPGA design to the logic

analyzer setup is manual and

tedious. When new signals

are routed out, you need to

Figure 1. FPGA dynamic probe for Altera used in conjunction with an Agilent logic

analyzer provides the most effective solution for simple through complex debugging of

systems incorporating Altera FPGAs.

manually update these signal

names on the logic analyzer,

which takes additional time

and is a potential source of

confusing errors.

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Shrnutí obsahu

Strany 1 - Agilent Technologies

Agilent TechnologiesB4656A FPGA Dynamic Probe for AlteraData SheetThe challengeYou rely on the insight a logicanalyzer provides to understandthe behav

Strany 2

2FPGA dynamic probe lets you:View internal activity – With a logic analyzer, you are normallylimited to measuring signals atthe periphery of the FPGA.

Strany 3

3Design step 1: Configure the logicanalyzer interface file and coreparametersYou need to create a logicanalyzer interface file with the logic analyzer

Strany 4 - (continued)

4A quick tour of the application (continued)Design step 3: Assign logic analyzerinterface bank parametersAssign internal signals to eachbank in the lo

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5A quick tour of the application (continued)Measurement setup step 1: Establisha connection between the logicanalyzer and the logic analyzerinterface

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6A quick tour of the application (continued)Setup complete: Make measurementsQuickly change which signal bankis routed to the logic analyzer. Asingle

Strany 7 - Ordering information

7Agilent B4656A specifications and characteristicsSupported logic analyzersStandalone logic analyzers 1680 Series, 1690 Series, 16800 SeriesModular l

Strany 8 - Remove all doubt

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