Agilent Technologies ESG Specifikace Strana 213
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Hodnocené. / 5. Na základě hodnocení zákazníků
Fully Coded 3GPP W-CDMA Personality User’s and Programming Guide 4-5
ESG Family Signal Generators Operation
Option 200 W-CDMA Frame Structures
Uplink DPDCH/DPCCH Frame Structure
There are two types of uplink dedicated physical channels, the uplink Dedicated Physical
Data Channel (uplink DPDCH) and the uplink Dedicated Physical Control Channel
(uplink DPCCH). The DPDCH and the DPCCH are I/Q multiplexed within each radio
frame.
The uplink DPCCH is used to carry control information generated at Layer 1. The Layer 1
control information consists of known pilot bits (Pilot) to support channel estimation for
coherent detection, transmit power control (TPC) commands, feedback information (FBI),
and an optional transport format combination indicator (TFCI) as shown in Figure 4-4.
The TFCI informs the receiver regarding the instantaneous transport format combination
of the transport channels mapped to the simultaneously transmitted uplink DPDCH radio
frame.
Figure 4-4 Uplink DPDCH/DPCCH Frame Structure
The exact number of uplink DPDCH bits is shown in Table 4-3.
Table 4-3 Uplink DPDCH Fields
Slot
Format
Bit Rate
(kbps)
Symbol
Rate (ksps)
Spread
Factor
Bits per
Frame
Bits per
Slot
N
Data
015152561501010
130301283002020
2 60 60 64 600 40 40
3 120 120 32 1200 80 80
4 240 240 16 2400 160 160
5 480 480 8 4800 320 320
6 960 960 4 9600 640 640
- Agilent Technologies 1
- Contents 10
- ESG Family Signal Generators 11
- Option 200 11
- Overview 12
- Option 200 Overview 13
- Uplink Channel 14
- Overview Option 200 16
- 2 Using Functions 17
- Required Equipment 18
- Configuring the ESG 18
- System Configuration Process 22
- Connect the Equipment 23
- The W-CDMA Configuration 24
- Configure ESG 1 26
- Configure ESG 2 27
- Refer to the following table 28
- Return on both 31
- Channel State 38
- Table 4-12.) 39
- Table 4-12 40
- Amplitude > − 42
- Table 4-12) 46
- In-Band Interferer 59
- Band 1 Interferer 60
- Band 2 Interferer 60
- Band 3 Interferer 60
- CW interferer 70
- interferers I 87
- Interferers BER 89
- Interferers BER Value 89
- Uplink Measurement Setup 92
- Performance Test Preparation 96
- Configuration 104
- Interferer BER 120
- Example Test Record 130
- Troubleshooting 131
- Troubleshooting Option 200 132
- 3 Softkey Reference 133
- # of Blocks 134
- % Power Other ESG 134
- % Power This ESG 134
- Numerics 135
- Actual BER 137
- Actual BLER 137
- Adjust Code Domain Power 138
- All Down 138
- AMR 12.2 (25.944 v3.3) 139
- AMR 12.2 kbps 139
- APCO 25 C4FM 139
- Apply Bit Errors 139
- Apply Channel Setup 141
- BCH Data 142
- Bit Errors (numeric value) 144
- Bit Errors (percent value) 145
- Bits/Frame 146
- Bits Rate 146
- Blk Size 147
- Channel Code 148
- Chip Rate 149
- CRC Size 150
- Create File 151
- Define User FIR 152
- Display FFT 154
- Display Impulse Response 155
- Edit File 157
- Edit Item 157
- Equal Powers 157
- Err Insert 158
- Error Bits 158
- Error Blocks 158
- Ext Clock Rate X1 X2 X4 159
- FBI Pattern 160
- FBI State 160
- Filter Alpha 161
- Filter BbT 162
- Filter Symbols 163
- Frame Clock Interval 164
- Frame Clock Polarity Neg Pos 165
- Gaussian 166
- Generate 167
- Goto Bottom Row 167
- Goto Middle Row 167
- Goto Row 167
- Goto Top Row 167
- Insert 0’s 169
- Insert 1’s 169
- Insert PN9 169
- Interleaver 170
- I/Q Voltage Scale 171
- IS-95 Mod 172
- IS-95 Mod w/EQ 172
- IS-95 w/EQ 172
- Link Control 174
- Link Down Up 174
- Load Default FIR 174
- Load From Selected File 175
- Load/Store 175
- Max Puncture 176
- Num of Blk 178
- Optimize FIR For EVM ACP 180
- Oversample Ratio 181
- Paging Indicator 182
- Physical Channel # 183
- PhyCH Setup 183
- PhyCH Type 183
- Puncture 186
- Rate Match Attr 187
- Ref Measure Setup 188
- Restore Default Filter 188
- RMC 12.2 kbps (25.141 v3.4) 188
- RMC 64 kbps (25.141 v3.4) 189
- RMC 144 kbps (25.141 v3.4) 189
- RMC 384 kbps (25.141 v3.4) 189
- Root Nyquist 190
- Scrambling Code 191
- SecScr Code OS 191
- Select File 192
- Select Pattern 192
- Slot Delay (numeric value) 193
- SFN RST Polarity Neg Pos 193
- Signal Setup 193
- Slot Format 194
- Store To File 195
- Symbol Rate 196
- Sync Trigger Mode Single Cont 197
- TFCI Pattern 198
- TFCI State 198
- Time Offset 198
- Total Bits 199
- Total Blocks 199
- TPC Pat Steps 199
- TPC Pattern 200
- Transport Channel # 201
- TrCH Setup 201
- TrCH State Off On 201
- Tr Position 202
- UDI 64 (25.944 v3.0) 203
- UDI 64 kbps 203
- UDI ISDN (25.944 v3.3) 203
- UE Setup 203
- UN3/4 GSM Gaussian 204
- Uplink Sync Setup 204
- User File 204
- User FIR 205
- Voltage Other ESG 206
- Voltage This ESG 206
- W-CDMA Off On 207
- W Option 200 208
- 4 Operation 209
- W-CDMA Frame Structures 210
- Downlink Data Generation 215
- Couplings and Values 217
- Uplink Data Generation 221
- Capabilities 228
- System Functionality 229
- Uplink Capabilities 235
- Downlink SCPI Commands 242
- CPICH Setup 243
- DCH Transport Channel Setup 244
- DPCH Setup 246
- Filter Setup 250
- OCNS Setup 251
- P–CCPCH Setup 252
- PSCH Setup 255
- SSCH State 255
- Uplink SCPI Commands 256
- DPDCH Channel Setup 260
- Uplink Setup 269
- between downlink and uplink 270
- Programming Example 272
- Uplink Reference Sensitivity 273
- Program Comments 275
- 6 Programming Command 277
- Rectangle 287
- Index I-1 293
- I-2 Index 294
- Index I-3 295
- I-4 Index 296
- Index I-5 297
- I-6 Index 298
- Index I-7 299
- I-8 Index 300
- Index I-9 301
- I-10 Index 302
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